A Recursive Block based Power Aware Imprecise Multiplier

This paper proposes a novel recursive structure block-based Wallace tree multiplier with the capability to tune its accuracy based on the precision and power requirements. The multiplier performs multiplication operations recursively from small blocks to large blocks, with a fine grain capability of turning off small blocks to trade off with power. By tuning the fidelity design “knob”, we show that the 32-bit implementation of the proposed imprecise multiplier can achieve an average power savings up to 47% and 10% improvement in latency compared to a convectional Wallace tree multiplier. A case study on JPEG compression algorithm demonstrates the promising application of such multiplier design.